Chips are critical to the automotive industry, as evidenced by a recent major crisis. And vice versa as the auto sector is the second largest market for chips, with a share of about 15%, according to US semiconductor equipment company Applied Energy Systems.

In late 2020, a widespread chip shortage led to a serious break in the global vehicle supply chain, and the impact lasted for a considerable period. The shortage was driven by several reasons, including Covid lockdowns, industrial upgrades, trade issues, and water and electricity shortages in Taiwan – a major global semiconductor supplier.  

The “chip crisis” resulted in a global revenue loss in the automotive industry of approximately $210 billion, according to Statista. The chip supply crunch shortage reduced global vehicle production by around 19.6 million units between 2021 and 2023, with manufacturing lead times skyrocketing to 10-12 months from their normal three to four months, according to Techwire Asia and Statista. JP Morgan estimates that at the peak of the shortage, in the first nine months of 2021, global auto production fell 26%.

While supply was contracting, demand for chips has been expanding with the advance of intelligent electric vehicles. The devices play a vital role in helping realise the smart functions of EVs. According to data from the China Association of Automobile Manufacturers (CAAM), the number of automotive chips required for a conventional car is about 600-700 units. For EVs, the volume increases to around 1,600 units. For more advanced smart cars, it is expected to reach 3,000 units/vehicle.

Such applications also require more efficient chips, with enhanced computing power, cost and power consumption. One important indicator describing how advanced the chip manufacturing process is relates to the “nanometre number.” Usually, the lower the nanometre number of the chip, the higher the precision of the chip manufacturing process. Although the nanometre number has a certain impact on the computing power, it is not the only factor that determines the computing power. In addition to nanometre size, there are other factors such as the number of transistors, the number of cores, and the size. The lower the nanometre in the chip manufacturing process, the higher the cost, Kallanish notes.

TMSC to help US chip revitalisation

The Biden Administration is pushing for the revitalisation of the US chip industry and the overall manufacturing industry amid China’s strong growth and leading position in the EV industry.

“America invented these chips, but over time, we went from producing nearly 40% of the world’s capacity to just over 10%, and none of the most advanced chips, exposing us to significant economic and national security vulnerabilities. I was determined to turn that around, and thanks to my CHIPS and Science Act – a key part of my Investing in America agenda – semiconductor manufacturing and jobs are making a comeback,” Biden said in a White House announcement.

US Secretary of Commerce Gina Raimondo said in late February the investments of this act will put the US on track to manufacture roughly 20% of leading-edge logic chips by the end of the decade.

Currently, 90% of the world’s leading-edge logic chips are manufactured by Taiwanese firm TSMC. The company is widely recognised as a global leader in semiconductor manufacturing, having pioneered the pure-play foundry business model in 1987.

On 8 April, the US Department of Commerce (DOC) and TSMC US subsidiary, TSMC Arizona, signed a non-binding preliminary memorandum of terms (PMT). The US government agreed to provide up to $6.6 billion in direct funding under the CHIPS and Science Act to support the company’s three cutting-edge chip manufacturing factories in Phoenix, Arizona. The chips to be produced in these greenfield projects will be used in fields such as artificial intelligence, high-performance computing, and communications, which are essential for intelligent EVs. 

“TSMC’s three fabs are expected to bring a suite of the most advanced process node technologies to the US… At full capacity, TSMC Arizona’s three fabs would manufacture tens of millions of leading-edge chips,” DOC said. “The first fab will produce four-nanometre FinFET process technologies, and the mass production will be started by the first half of 2025. The second fab will focus on 2-nm nanosheet process technology, which is said to the be most advanced in the world, on top of the previously announced 3-nm nanosheet process technology. And the third fab will produce 2-nm or more advanced process technologies depending on customer demand.”

TSMC announced plans to invest $12 billion in Phoenix in May 2020, to build an advanced semiconductor manufacturing fabrication. Its investment commitment is now surpassing $65 billion in three fabs. The Arizona subsidiary will start first production in H1 2025. The second plant will be operational in 2028 and the third should be online by decade-end.

Even though the Taiwanese firm seems to be making progress in the US, playing a vital role in the US’s goal to onshore semiconductor manufacturing, its founder Zhongmou Zhang has questioned TSMC Arizona’s viability. In 2022, he was reported by Taiwanese and Chinese media as saying the US’ attempt to increase local chip production “would be an unprofitable, very expensive and useless move as the cost of producing chips in the US is 50% higher compared to Taiwan.”

Will history repeat itself?

Yet, TSMC’s expansion also includes investments domestically, in Taiwan, and abroad in Japan. According to its senior vice president of human resources, Laura Ho, the company will hire 23,000 new workers in coming years. “In order to adapt to the tremendous growth, TSMC constructed a new factory in Taichung exclusively for training,” she said last week.

In March, Wencan Zheng, deputy head of the administrative agency of the Taiwan authorities, said in Chiayi County that TSMC will build two more advanced packaging plants at the Chiayi Science Park. Construction is expected to be completed in 2026. 

It is said the advanced packaging technology is the CoWoS technique. It is a high-precision packaging technology that involves stacking chips together to increase processing power while saving space and reducing power consumption. Artificial intelligence is the major growth driver for packaging capacity. TSMC’s ceo Zhejia Wei said in January that the company plans to double CoWos production this year, further increasing it in 2025. The company is rumoured to plan to introduce this technique to its  Japanese operations.

In February, TSMC started production at its newly built 210,000-square-metre wafer fab in Kikuyo town, central Kyushu, Japan. The $8.6 billion project was built in only 20 months, compared to an estimate of five years. Japanese companies Sony, Denso and Toyota also have stakes in it. It is the company’s first overseas plant following the factory in Nanjing, China in 2018.

Before TSMC’s entry, Japan did not have a chip production line more advanced than 40 nm. Different from the situation in the US, TSMC is only focusing on its less advanced and more mature technologies in Japan. The first phase focuses on 28-nm and 16-nm chips, and the second phase focuses on 7-nm units, which will be about ten years behind TSMC’s latest progress when it is put into production. 

Going back to the origins of chip manufacturing and the end of World War II, the US supported Japan against the Soviet Union. Then, the chip industry didn’t require much energy and space, so it was perfect for Japan. The Asian country absorbed a lot of American technology and produced copies with weaker performance and lower prices. However, Japanese companies eventually started beating American counterparts, prompting the US to start taking anti-dumping measures against the Japanese semiconductor industry.

While the first US semiconductor trade war was in the late 1980s against Japan, and the ongoing chip war with China seems nowhere near de-escalating.